Workshop and Tutorial

Saturday Feb 16, 2019

[07:00-09:00] Breakfast (Mezzanine Foyer)
[08:00-17:00] Registration (Mezzanine Foyer)
Morning [08:00-12:00]	AACBB: Accelerators Architecture for Computational Biology and Bioinformatics (Part1) Room: Dogwood Room	ASAD: Architectures and Systems for Autonomous Devices Room: Scarlet Oak Room	FPGA-based Accelerated Cloud Computing with SDAccel (Part1) Room: Silver Linden Room	MAERI-Enabling Rapid Design Space Exploration and Prototyping of DNN Accelerators (Part1) Room: Tulip Room	BigDataBench: A Scalable and Unified Big Data and AI Benchmark Suite (Part1) Room: University of DC Room
[12:00-13:00] Lunch (Mezzanine Foyer)
Afternoon [13:00-17:00]	AACBB: Accelerators Architecture for Computational Biology and Bioinformatics (Part2) Room: Dogwood Room	~~HCSDA: Heterogeneous Computation in Specific Domain Accelerations~~ Cancelled	FPGA-based Accelerated Cloud Computing with SDAccel (Part2) Room: Silver Linden Room	MAERI-Enabling Rapid Design Space Exploration and Prototyping of DNN Accelerators (Part2) Room: Tulip Room	BigDataBench: A Scalable and Unified Big Data and AI Benchmark Suite (Part2) Room: University of DC Room

Sunday Feb 17, 2019

[07:00-09:00] Breakfast (Mezzanine Foyer)
[08:00-17:00] Registration (Mezzanine Foyer)
Morning [08:00-12:00]	EMC2: Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications (Part1) Room: Dogwood Room	HiPINEB: High-Performance Interconnection Networks in the Exascale and Big-Data Era (Part1) Room: Scarlet Oak Room	SecArch: Built-in Security: Architecture, Chip and System Room: Silver Linden Room	Device, Circuit, and Architecture Challenges for Super Conducting Chips (Part1) Room: Tulip Room
[12:00-13:00] Lunch (Mezzanine Foyer)
Afternoon [13:00-17:00]	EMC2: Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications (Part2) Room: Dogwood Room	HiPINEB: High-Performance Interconnection Networks in the Exascale and Big-Data Era (Part2) Room: Scarlet Oak Room	Principles of Secure Processor Architecture Design Room: Silver Linden Room	Device, Circuit, and Architecture Challenges for Super Conducting Chips (Part2) Room: Tulip Room	YArch: Young Architect Workshop Room: University of DC Room