HPCA Keynote: Towards Secure High-Performance Computer Architectures
Srini Devadas (MIT)

90-second lightning talks for 26 papers presented on Monday.

Session Chair: Josep Torrellas

The Accelerator Wall: Limits of Chip Specialization
[Slides] Adi Fuchs and David Wentzlaff (Princeton University)

Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores
Artemiy Margaritov (University of Edinburgh); Siddharth Gupta (EPFL); Rekai Gonzalez-Alberquilla (Arm Ltd, Cambridge, UK); Boris Grot (University of Edinburgh)

CIDR: A Cost-Effective In-line Data Reduction System for Terabit-per-Second Scale SSD Arrays
[Lightning-talk Video] [Slides] Mohammadamin Ajdari (POSTECH); Pyeongsu Park, Joonsung Kim, Dongup Kwon, and Jangwoo Kim (Seoul National University)

Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA
[Slides] Ashish Venkat (UCSD/UVA); Harsha Basavaraj and Dean Tullsen (UCSD)

Session Chair: Antonio Gonzalez

HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Array
[Slides] Linghao Song and Jiachen Mao (Duke University); Youwei Zhuo and Xuehai Qian (University of Southern California); Hai Li and Yiran Chen (Duke University)

E-RNN: Design Optimization for Efficient Recurrent Neural Networks in FPGAs
Zhe Li (Syracuse University); Caiwen Ding and Siyue Wang (Northeastern University); Wujie Wen (Florida International University); Youwei Zhuo (University of Southern California); Chang Liu (Carnegie Mellon University); Qinru Qiu (Syracuse University); Wenyao Xu (University at Buffalo (SUNY)); Xue Lin (Northeastern University); Xuehai Qian (University of Southern California); Yanzhi Wang (Northeastern University)

Bit Prudent In-Cache Acceleration of Deep Convolutional Neural Networks
[Slides] Xiaowei Wang and Jiecao Yu (University of Michigan, Ann Arbor); Charles Augustine and Ravi Iyer (Intel); Reetuparna Das (University of Michigan, Ann Arbor)

Shortcut Mining: Exploiting Cross-layer Shortcut Reuse in DCNN Accelerators
[Lightning-talk Video] [Slides] Arash Azizimazreah and Lizhong Chen (Oregon State University)

Session Chair: Ulya Karpuzcu

Fine-tuning the Active Timing Margin (ATM) Control Loop for Maximizing Multicore Efficiency on an IBM POWER Server
[Slides] Yazhou Zu and Daniel Richins (University of Texas at Austin); Charles Lefurgy (IBM Research); Vijay Janapa Reddi (University of Texas at Austin/Google)

μDPM: Dynamic Power Management for the Microsecond Era
[Slides] Chih-Hsun Chou, Laxmi N Bhuyan, and Daniel Wong (University of California, Riverside)

Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs
George Papadimitriou, Athanasios Chatzidimitriou, and Dimitris Gizopoulos (University of Athens)

Resilient Low Voltage Acceleration for High Energy Efficiency
Nandhini Chandramoorthy, Karthik Swaminathan, Martin Cochet, Schuyler Eldridge, Arun Paidimarri, Rajiv Joshi, Matthew Ziegler, Alper Buyuktosunoglu, and Pradip Bose (IBM Research)

Session Chair: David Lo

Pliant: Leveraging Approximation to Improve Datacenter Resource Efficiency
Neeraj Kulkarni, Feng Qi, and Christina Delimitrou (Cornell University)

Kelp: QoS for Accelerators in Machine Learning Platforms
[Slides] Haishan Zhu (Microsoft); David Lo, Liqun Cheng, Rama Govindaraju, and Parthasarathy Ranganathan (Google); Mattan Erez (The University of Texas at Austin)

Enhancing Server Efficiency in the Face of Killer Microseconds
Amirhossein Mirhosseini, Akshitha Sriraman, and Thomas F. Wenisch (University of Michigan)

Poly: Efficient Heterogeneous System and Application Management for Interactive Applications
Shuo Wang and Yun Liang (Peking University); Wei Zhang (Hong Kong University of Science and Technology)

Session Chair: Mahdi Bojnordi

The What's Next Intermittent Computing Architecture
[Lightning-talk Video] Karthik Ganesan (University of Toronto); Joshua San Miguel (University of Wisconsin-Madison); Natalie Enright Jerger (University of Toronto)

eQASM: An Executable Quantum Instruction Set Architecture
Xiang Fu (QuTech, Delft University of Technology; Quantum Computer Architecture Lab, Delft University of Technology); Leon Riesebos (Quantum Computer Architecture Lab and QuTech, Delft University of Technology); M. A. Rol (QuTech, Delft University of Technology; Kavli Institute of Nanoscience, Delft University of Technology); Jeroen van Straten (Computer Engineering Lab, Delft University of Technology); Hans van Someren, Nader Khammassi, and Imran Ashraf (Quantum Computer Architecture Lab and QuTech, Delft University of Technology); Raymond Vermeulen (QuTech, Delft University of Technology; Kavli Institute of Nanoscience, Delft University of Technology); Vincent Newsum and Kelvin Loh (Netherlands Organisation for Applied Scientific Research (TNO); QuTech, Delft University of Technology); Jacob de Sterke (Topic Embedded Systems; QuTech, Delft University of Technology); Wouter Vlothuizen (Netherlands Organisation for Applied Scientific Research (TNO); QuTech, Delft University of Technology); Raymond Schouten (QuTech, Delft University of Technology; Kavli Institute of Nanoscience, Delft University of Technology); Carmina G. Almudever (Quantum Computer Architecture Lab and QuTech, Delft University of Technology); Leo DiCarlo (QuTech, Delft University of Technology; Kavli Institute of Nanoscience, Delft University of Technology); Koen Bertels (Quantum Computer Architecture Lab and QuTech, Delft University of Technology)

Reliability Evaluation of Mixed-Precision Architectures
[Slides] Fernando Fernandes dos Santos, Daniel Oliveira, Caio Lunardi, Fabiano Pereira Libano, and Paolo Rech (UFRGS)

Architecting Waferscale Processors - A GPU Case Study
Saptadeep Pal (UCLA); Daniel Petrisko and Matthew Tomei (UIUC); Puneet Gupta and Subramanian S. Iyer (UCLA); Rakesh Kumar (UIUC)

Session Chair: Yan Solihin

Conditional Speculation: An Effective Approach to Safeguard Out-of-Order Execution Against Spectre Attacks
Peinan Li, Lutan Zhao, and Rui Hou (Institute of Information Engineering, CAS); Lixin Zhang (HXT Semiconductor Co.LTD); Dan Meng (Institute of Information Engineering, CAS)

FPGA-based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data
Sujoy Sinha Roy, Furkan Turan, Frederik Vercauteren, and Ingrid Verbauwhede (COSIC, ESAT, KU Leuven); Kimmo Järvinen(University of Helsinki)

POWERT Channels: A Novel Class of Covert Communication Exploiting Power Management Vulnerabilities
S. Karen Khatamifard (University of Minnesota); Longfei Wang (University of South Florida); Amitabh Das; Selcuk Kose (University of Rochester); Ulya R. Karpuzcu (University of Minnesota)

Session Chair: Rami Sheikh

Killi: Runtime Fault Classification to Deploy Low Voltage Caches without MBIST
Shrikanth Ganapathy (AMD Research), John Kalamatianos (AMD Research), Brad Beckmann (AMD Research), Steven Raasch (AMD Research), Lukasz Szafaryn (Intel)

Gables: A Roofline Model for Mobile SoCs with Many Accelerators and Ceilings
Mark Hill (Google), Vijay Janapa Reddi (Google)

Machine Learning at Facebook: Understanding Inference at the Edge
[Slides] Carole-Jean Wu (Facebook), David Brooks (Facebook), Kevin Chen (Facebook), Douglas Chen (Facebook), Sy Choudhury (Facebook), Marat Dukhan (Facebook), Kim Hazelwood (Facebook), Eldad Isaac (Facebook), Yangqing Jia (Facebook), Bill Jia (Facebook), Tommer Leyvand (Facebook), Hao Lu (Facebook), Yang Lu (Facebook), Lin Qiao (Facebook), Brandon Reagen (Facebook), Joe Spisak (Facebook), Fei Sun (Facebook), Andrew Tulloch (Facebook), Peter Vajda (Facebook), Xiaodong Wang (Facebook), Yanghan Wang (Facebook), Bram Wasti (Facebook), Yiming Wu (Facebook), Ran Xian (Facebook), Sungjoo Yoo (Facebook), Peizhao Zhang (Facebook)

PPoPP Keynote: When Moore met Feynman: Ultra-dense data storage and extreme parallelism with electronic-molecular systems
Karin Strauss (Microsoft Research)

90-second lightning talks for 32 papers presented on Tue/Wed.

Session Chair: Lisa Hsu

VIP: A Versatile Inference Processor
Skand Hurkat and José F. Martínez (Cornell University)

Darwin-WGA: A Co-processor Provides Increased Sensitivity in Whole Genome Alignments with High Speed
[Slides] Yatish Turakhia, Sneha D. Goenka, and Gill Bejerano (Stanford University); William J. Dally (Stanford University, NVIDIA Research)

Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads
Abanti Basak, Xing Hu, Shuangchen Li, Sang Min Oh, and Xinfeng Xie (University of California, Santa Barbara); Li Zhao and Xiaowei Jiang (Alibaba Inc.); Yuan Xie (University of California, Santa Barbara)

FPGA Accelerated INDEL Realignment in the Cloud
Lisa Wu and David Bruns-Smith (University of California Berkeley); Frank A. Nothaft (Databricks); Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krsté Asanovic, David A. Patterson, and Anthony D. Joseph (University of California Berkeley)

Session Chair: Avinash Karanth

Bingo Spatial Data Prefetcher
Mohammad Bakhshalipour (Sharif University of Technology); Mehran Shakerinava (Sharif University of Technology); Pejman Lotfi-Kamran (Institute for Research in Fundamental Sciences (IPM)); Hamid Sarbazi-Azad (Sharif University of Technology)

NoMap: Speeding-Up JavaScript Using Hardware Transactional Memory
[Slides] Thomas Shull and Jiho Choi (University of Illinois Urbana-Champaign); Maria Garzaran (Intel); Josep Torrellas (University of Illinois Urbana-Champaign)

FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads
Jie Zhang and Myoungsoo Jung (Yonsei University); Mahmut Kandemir (Penn State University)

Featherlight Reuse-distance Measurement
[Slides] Qingsen Wang (College of William & Mary); Millind Chabbi (Uber); Xu Liu (College of William & Mary)

Session Chair: Chris Hughes

Efficient Load Value Prediction using Multiple Predictors and Filters
[Slides] Rami Sheikh (Qualcomm), Derek Hower (Qualcomm)

BRB: Mitigating Branch Predictor Side-Channels
[Slides] Ilias Vougioukas (ARM Research/U. of Southampton), Nikos Nikoleris (ARM Research), Andreas Sandberg (ARM Research), Stephan Diestelhorst (ARM Research), Bashir M. Al-Hashimi (U. of Southampton), Geoff V. Merrett (U. of Southampton)

Elastic Instruction Fetching
[Slides] Arthur Perais (Qualcomm), Rami Sheikh (Qualcomm), Luke Yen (Qualcomm), Michael McIlvaine (Qualcomm), Robert D. Clancy (Qualcomm)

Session Chair: Daniel J. Sorin

Amoeba: An Autonomous Backup and Recovery SSD for Ransomware Attack Defense
[Lightning-talk Video] [Slides] Donghyun Min (Sogang University), Donggyu Park (Sogang University), Jinwoo Ahn (Sogang University), Ryan Walker (University of Texas at San Antonio), Junghee Lee (University of Texas at San Antonio), Sungyong Park (Sogang University), Youngjae Kim (Sogang University)

The Architectural Implications of Cloud Microservices
Yu Gan and Christina Delimitrou (Cornell University)

An Alternative Analytical Approach to Associative Processing
Soroosh Khoram, Yue Zha, and Jing Li (University of Wisconsin-Madison)

Session Chair: Nuwan Jayasena

Poise: Balancing Thread-Level Parallelism and Memory System Performance in GPUs using Machine Learning
[Slides] Saumay Dublish, Vijay Nagarajan, and Nigel Topham (The University of Edinburgh)

A Hybrid Framework for Fast and Accurate GPU Performance Estimation through Source-Level Analysis and Trace-Based Simulation
Xiebing Wang (Technical University of Munich); Kai Huang (Sun Yat-sen University); Xuehai Qian (University of Southern California); Alois Knoll (Technical University of Munich)

Understanding the Future of Energy Efficiency in Multi-Module GPUs
[Slides] Akhil Arunkumar (Arizona State University); Evgeny Bolotin and David Nellans (Nvidia); Carole-Jean Wu (Arizona State University)

Session Chair: Rui Hou

R3-DLA (Reduce, Reuse, Recycle): A More Efficient Approach to Decoupled Look-Ahead Architectures
[Lightning-talk Video] Sushant Kondguli and Michael Huang (University of Rochester)

Recycling Data Slack in Out-of-Order Cores
[Slides] Gokul Subramanian Ravi and Mikko Lipasti (University of Wisconsin - Madison)

Freeway: Maximizing MLP for Slice-Out-of-Order Execution
[Slides] Rakesh Kumar (Norwegian University of Science and Technology (NTNU), Norway); Mehdi Alipour and David Black-Schaffer (Uppsala University, Sweden)

Organizer:
Josep Torrellas (University of Illinois at Urbana-Champaign)
Panelists:
Reetuparna Das (University of Michigan)
Lisa Hsu (Microsoft)
Ulya Karpuzcu (University of Minnesota)
John Kim (KAIST)

CGO Keynote: Rethinking Compilation in a Heterogeneous World (Salon 6)
Michael O'Boyle (University of Edinburgh)

Session Chair: Jayneel Gandhi

Enabling Transparent Memory-Compression for Commodity Memory Systems
[Lightning-talk Video] [Slides] Vinson Young, Sanjay Kariyappa, and Moinuddin Qureshi (Georgia Institute of Technology)

D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput
[Lightning-talk Video] [Slides] Jeremie S Kim (Carnegie Mellon University; ETH Zurich); Minesh Patel and Hasan Hassan (ETH Zurich); Lois Orosa (ETH Zurich; Universidade Estadual de Campinas); Onur Mutlu (ETH Zurich; Carnegie Mellon University)

PageSeer: Using Page Walks to Trigger Page Swaps in Hybrid Memory Systems
[Slides] Apostolos Kokolis, Dimitrios Skarlatos, and Josep Torrellas (University of Illinois, Urbana-Champaign)

Session Chair: Xuehai Qian

PIM-VR: Erasing Motion Anomalies In Highly-Interactive Virtual Reality World With Customized Memory Cube
[Lightning-talk Video] Chenhao Xie and Xingyao Zhang (University of Houston); Ang Li (Pacific Northwest National Laboratory); Xin Fu (University of Houston); Shuaiwen Leon Song (Pacific Northwest National Laboratory)

Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline
Martí Anglada, Joan-Manuel Parcerisa, and Enrique de Lucas (Universitat Politècnica de Catalunya); Juan Luis Aragón (Universidad de Murcia); Pedro Marcuello (unaffiliated); Antonio González (Universitat Politècnica de Catalunya)

Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline
Martí Anglada, Enrique de Lucas, and Joan-Manuel Parcerisa (Universitat Politècnica de Catalunya); Juan Luis Aragón (Universidad de Murcia); Antonio González (Universitat Politècnica de Catalunya)

Session Chair: Moin Qureshi

String Figure: A Scalable and Elastic Memory Network Architecture
[Lightning-talk Video] [Slides] Matheus Ogleari (University of California, Santa Cruz); Ye Yu (University of Kentucky); Chen Qian and Ethan Miller (University of California, Santa Cruz); Jishen Zhao (University of California, San Diego)

NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks
[Lightning-talk Video] [Slides] Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, and Lee-Sup Kim (KAIST)

Active-Routing: Compute on the Way for Near-Data Processing
[Slides] Jiayi Huang (Texas A&M University); Ramprakash Reddy Puli (NVIDIA); Pritam Majumder and SungKeun Kim (Texas A&M University); Rahul Boyapati (Intel Corporation); Ki Hwan Yum and Eun Jung Kim (Texas A&M University)

Session Chair: Niti Madan

Understanding the Impact of Socket Density in Density Optimized Servers
Manish Arora (AMD Research/UC San Diego), Matt Skach (University of Michigan), Wei Huang (AMD Research), Xudong An (AMD Research), Jason Mars (U. of Michigan), Lingjia Tang (U. of Michigan), Dean M. Tullsen (UC San Diego)

A Scalable Priority-Aware Approach to Managing Data Center Server Power
[Slides] Yang Li (IBM/Carnegie Mellon U.), Charles Lefurgy (IBM), Karthick Rajamani (IBM), Malcolm Ware (IBM), Guillermo J. Silva (IBM), Daniel D. Heimsoth (IBM), Saugata Ghose (Carnegie Mellon U.), Onur Mutlu (ETH Zurich/Carnegie Mellon U.)

Power Aware Heterogeneous Node Assembly
[Slides] Bilge Acun (IBM TJ Watson), Alper Buyuktosunoglu (IBM TJ Watson), Eun Kyung Lee (IBM TJ Watson), Yoonho Park (IBM TJ Watson)